tag:blogger.com,1999:blog-11548470.post111177254552676989..comments2023-09-09T10:42:33.886-04:00Comments on Beta Geek: FPGAs *and* Linux?! Be Still My Beating HeartRajhttp://www.blogger.com/profile/17391648524886543419noreply@blogger.comBlogger2125tag:blogger.com,1999:blog-11548470.post-1112871604542007772005-04-07T07:00:00.000-04:002005-04-07T07:00:00.000-04:00Schematic entry may be a better way, but when you'...Schematic entry may be a better way, but when you're talking a few hundred man-hours for something like a FIFO, there's problems..<BR/><BR/>hell, how long did our "encryption" chip take? And it didnt even work :-)Rajhttps://www.blogger.com/profile/17391648524886543419noreply@blogger.comtag:blogger.com,1999:blog-11548470.post-1112871016060214452005-04-07T06:50:00.000-04:002005-04-07T06:50:00.000-04:00Man, I just had to clean my keyboard over that one...Man, I just had to clean my keyboard over that one.... Too bad that codec is in Verilog instead of VHDL ;-). Speaking of, I was informed (yet again) at work that hardware description languages are a really crappy way to design hardware, and that schematic entry is the only way to design anything that is decently fast. Imagine doing that codec gate-by-gate.....Jameshttps://www.blogger.com/profile/17362372906267619372noreply@blogger.com